1. Field of the Invention
The present invention relates to semiconductor devices and manufacturing methods therefor, and more particularly, to a semiconductor device having a hermetically sealed light-receiving area formed on a semiconductor chip, and a manufacturing method therefor.
2. Description of the Related Art
An area sensor or a linear sensor using a solid-state imager device such as a CMOS (Complementary Metal Oxide Semiconductor) device is structured such that the solid-state imager device is accommodated in a hollow package made of, e.g., a ceramic or plastic material, in a hermetically sealed state to prevent ingress of moisture, dust and the like from outside. An area sensor or a linear sensor using such a hollow package is disclosed, for example, in Japanese Patent Application Publication No. 6-21414.
FIG. 4 is a cross-section outlining a configuration of a related-art solid-state image capture apparatus. In a solid-state image capture apparatus 101 herein shown, a solid-state imager device 104 is disposed in a cavity 103 formed approximately in a midsection of a base 102, e.g., a ceramic or plastic base, and electrically connected to leads 105, e.g., alloy-42 or copper leads, extending outward from a peripheral portion of the base, via bonding wires 106.
A frame 107 having a predetermined height is mounted just upon the leads, and a translucent lid 108 made of glass or the like is buried in a recess of the frame. A sealant made of an epoxy resin is used to bond the frame and the translucent lid together, thus hermetically sealing a cavity space with the translucent lid.
The above-described solid-state image capture apparatus is structured to protect its solid-state imager device from externally entering moisture, dust and the like, by hermetically sealing the cavity space with the translucent lid. However, this solid-state image capture apparatus encounters difficulty in sufficiently meeting a demand of miniaturization which has been placed by latest cameras for mounting on camera-incorporated mobile phones, digital still cameras and the like.
Namely, in the above-described solid-state image capture apparatus, its translucent lid is larger in planar size than its solid-state imager device, thus restricting the miniaturization.
In manufacturing the related-art solid-state image capture apparatus, a plurality of solid-state imager devices formed on a semiconductor wafer are divided into discrete pieces by using a dicing saw or the like, and each of the resultant solid-state imager devices is mounted on the base and then covered with the translucent lid. Thus, a process (dicing process) of dividing the semiconductor wafer into pieces is performed somewhere between the apparatus being in a semiconductor wafer state and the apparatus being in a solid-state imager device state ready to be covered with the translucent lid. In this dicing process, chipping and the like tend to adhere as dust to the light-receiving area of each solid-state imager device on the semiconductor wafer, possibly damaging a surface of the light-receiving area of the solid-state imager device.
In view of these points, a technique has been proposed, in which as shown in FIG. 5A, an adhesive layer 109 is formed on an outer peripheral portion of a light-receiving area 104A of a solid-state imager device 104, and a transparent plate 108, e.g., a glass plate, is disposed above the solid-state imager device to seal the light-receiving area by firm bonding with the adhesive layer, thereby keeping the light-receiving area of the solid-state imager device airtight (e.g., refer to Japanese Patent Application Publication No. 2004-296453).
If the technique described in Japanese Patent Application Publication No. 2004-296453 is used, the transparent plate can be smaller in planar size than the solid-state imager device, and in addition, since the sealing of the light-receiving area of each solid-state imager device precedes the dicing of the semiconductor wafer, the adhesion of the dicing-caused dust to the light-receiving area of the solid-state imager device can be suppressed.
However, with the technique described in Japanese Patent Application Publication No. 2004-296453, it is very difficult to keep a fixed gap between the transparent plate and the light-receiving area, because of a load applied during boding of the transparent plate.
In order to suppress the adhesive from being crushed by the load applied during bonding and thereby to keep the gap between the transparent plate and the light-receiving area fixed, it can be considered to mix a lot of filler particles with the adhesive. However, the mixture of a lot of filler particles may cause coming off of filler particles, and subsequent adhesion of dust to the light-receiving area. Consequently, this approach of mixing a lot of filler particles with the adhesive would not seem so appropriate.
To overcome this, another technique has been proposed, by which as shown in FIG. 5B, a spacer 112 coated with an adhesive 111 on both front and back surfaces of a copper spacer body 110 is formed by die-cutting or the like, and this spacer is bonded to a surrounding area of the light-receiving area 104A of the semiconductor chip 104, after which the spacer and the transparent plate are bonded together (see FIG. 5C). In this technique, as compared to the technique described in Japanese Patent Application Publication No. 2004-296453 in which the transparent plate is supported only by the adhesive, the crushing of the adhesive by the load applied during bonding of the transparent plate can be suppressed, and thus the gap between the transparent plate and the light-receiving area can be kept fixed.
In order for the spacer to be die-cut with the adhesive already applied to the front and back surfaces of its body, the adhesive is cured to some degree (i.e., semi-cured) for die-cutting.